In manufacturing of a semiconductor device having a multi-layered wiring structure, a resist pattern is formed on a surface of a semiconductor wafer (hereinafter referred to simply as “wafer”) by sequentially executing a resist coating step that applies a resist liquid onto the surface of the wafer to form a resist film; an exposure step that exposes the resist film with a predetermined pattern; and a developing step that develops the exposed resist film. Thereafter, a wafer etching step is performed using the resist film as a mask and then a resist film removing step is performed, so that a predetermined pattern is formed on the surface of the wafer. In order to produce the semiconductor device having the multi-layered wiring structure, the aforementioned process for forming a predetermined pattern in each layer is performed multiple times repeatedly.
In a case where patterns are formed in respective layers, namely, in a case where a (N+1)th layer is formed on a Nth layer having been patterned, a resist film for forming a pattern in the (N+1)th layer should have a suitable height level and thus the surface on which the resist liquid is to be applied must be flat. In order to achieve such a condition, an organic material is applied to a patterned layer to form an organic film such as one called SOC (Spin On Carbon). After the surface of the organic film is flattened, a resist liquid is applied onto the flattened organic film. It has been proposed a method of flattening of the organic film by etching back or removing the surface part of the organic film by using active oxygen and ozone which are generated by irradiating the organic film with ultraviolet ray. Japanese Patent Laid-open Publication No. JP2014-165252A discloses an apparatus for irradiating ultraviolet ray for the above purpose. Such an apparatus may be large-sized or complicated.